Electrically erasable and programmable memories in smart card integrated circuits are generally equipped with a programmable but non-erasable protected storage area intended to receive OTP bits, i.e., bits whose value can only be changed in one direction. Thus, by conventionally allocating the value 0 to an erased bit and the value 1 to a programmed bit, an OTP bit is distinguished from an ordinary bit in that it can be set to 1 but can no longer be reset to 0.
OTP bits are used in various applications related to securing data in memories, and are generally used as consumable tokens or to form irreversible counters. For example, OTP bits can be used to authorize access to certain storage areas during the steps of customizing a smart card, then they are all set to 1 when the smart card is marketed so as to block access to sensitive storage areas where secret codes are located, for example. The irreversibility of the programming of a memory cell comprising an OTP bit is therefore necessary to obtain a certain degree of security in smart card integrated circuits.
Furthermore, with the development of technologies and the increasingly advanced miniaturization of integrated circuits, it has become desirable to equip EEPROMS with a circuit allowing errors occurring in the storage of bits to be detected. These errors are generally due to a deterioration in the non-volatile electrical characteristics of memory cells (threshold voltage), and are more frequent in latest generation memories comprising floating-gate transistors having very short gates of less than 0.35 micrometers. A deterioration in the non-volatile electrical characteristics of a memory cell can result in the reading of an erroneous bit, such as the reading of a 0 although a 1 had initially been recorded.
To overcome this drawback, EEPROMS are equipped with an error correction circuit that associates to each binary word recorded an error correction code, or ECC code, generated for example by the Hamming algorithm that is well known to those skilled in the art. With each change of a bit of a binary word, this method requires the recording in the memory of a new ECC code associated to the binary word considered. However, this operation proves to be difficult in storage areas containing OTP bits since the recording of a new ECC code generally requires the erasing and the programming of memory cells receiving the code, while the memory cells of an OTP area cannot be erased.